This invention relates generally to current sense amplifiers and more particularly, it relates to a high speed CMOS current sense amplifier circuit which has a fast response time when making a low-to-high (zero to one) transition.
Current sense amplifiers are generally well known in the prior art and are typically used in electronic circuits to read data out of semiconductor memories such as EPROMs and EEPROMs. However, these prior art sense amplifiers suffer from the shortcomings of having to trade a high-to-low transition with a low-to-high transition. Because of commercial demands for significant increases in access time for addressable memories fabricated on integrated circuit semiconductor chips, it has become very important to memory designers to have available a current sense amplifier circuit which operates at high speeds so as to improve efficiency of the overall memory circuit operation.
It would therefore be desirable to provide a current sense amplifier circuit whose design does not depend upon a trade-off between the high-to-low and low-to-high transitions. In the present invention, the low-to-high transition is made extremely fast by precharging all bit-lines to ground with the aid of clamping transistors, thereby requiring that all of the bit-lines charge up from the ground level. This allows the circuit designer to optimize the sense amplifier for the high-to-low transition without deteriorating the low-to-high transition. The sense amplifier circuit of the instant invention has a low-to-high transition time of approximately 6 nanosecond at the temperature of +30.degree. C.